Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory
Paper in proceeding, 2012
Coherence protocol
Conflict detection
Conflict Resolution
Shared data
Concurrent transactions
Coarse-grained
Transactional memory
Author
Anurag Negi
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Ruben Titos Gil
Universidad de Murcia
M. E. Acacio
Universidad de Murcia
J. M. García
Universidad de Murcia
Per Stenström
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
18th IEEE International Symposium on High Performance Computer Architecture (;New Orleans, LA; February 25-29 2012
1530-0897 (ISSN)
141-151978-146730824-3 (ISBN)
Areas of Advance
Information and Communication Technology
Subject Categories (SSIF 2011)
Computer and Information Science
DOI
10.1109/HPCA.2012.6168951
ISBN
978-146730824-3