Electrically conductive thermal interface materials based on vertically aligned carbon nanotubes mats
Paper in proceeding, 2014
In power microelectronics, the trends towards miniaturization and higher performances result in higher power densities and more heat to be dissipated. In most electronic assembly, thermal interface materials (TIM) help provide a path for heat dissipation but still represent a bottleneck in the total thermal resistance of the system. VA-CNTs mats are typically grown on HR silicon substrate with Al2O3 diffusion barrier layer using Thermal CVD process. In many cases, 'die attach' thermal interface materials need to be electrically conductive and the growth of dense VA-CNT mats on an electrically conductive substrate remains a challenge. This paper presents the growth of dense VA-CNT mats on doped silicon with Al2O3 and TiN diffusion barrier layer. Processes, thermal and electrical characterization of VA-CNTs based thermal interface materials are studied and reported.
Author
J. Daon
Thales Research and Technology
Ecole Centrale Paris
Shuangxi Sun
Chalmers, Microtechnology and Nanoscience (MC2), Electronics Material and Systems Laboratory
Di Jiang
Chalmers, Microtechnology and Nanoscience (MC2), Electronics Material and Systems Laboratory
G. Cibien
Thales Research and Technology
E.M. Leveugle
Thales Research and Technology
C. Galindo
Thales Research and Technology
A. Ziaei
Thales Research and Technology
L. Ye
SHT Smart High Tech AB
Yifeng Fu
SHT Smart High Tech AB
J. Bai
Ecole Centrale Paris
Johan Liu
Chalmers, Microtechnology and Nanoscience (MC2), Electronics Material and Systems Laboratory
IEEE 20th International Workshop on Thermal Investigation of ICs and Systems (Therminic). Greenwich, London, United Kingdom, 24-26 September 2014
6972534
978-1-4799-5415-5 (ISBN)
Subject Categories (SSIF 2011)
Materials Engineering
DOI
10.1109/THERMINIC.2014.6972534
ISBN
978-1-4799-5415-5